The well-known Internet network is a notoriously well-known publicly-accessible communication network at the time of filing the present patent application, and arguably the most robust information and communication source ever made available. The Internet is used as a prime example in the present application of a data-packet-network which will benefit from the apparatus and methods taught in the present patent application, but is just one such network, following a particular standardized protocol. As is also very well known, the Internet (and related networks) are always a work in progress. That is, many researchers and developers are competing at all times to provide new and better apparatus and methods, including software, for enhancing the operation of such networks.
In general the most sought-after improvements in data packet networks are those that provide higher speed in routing (more packets per unit time) and better reliability and fidelity in messaging. What is generally needed are router apparatus and methods increasing the rates at which packets may be processed in a router.
As is well-known in the art, packet routers are computerized machines wherein data packets are received at any one or more of typically multiple ports, processed in some fashion, and sent out at the same or other ports of the router to continue on to downstream destinations. As an example of such computerized operations, keeping in mind that the Internet is a vast interconnected network of individual routers, individual routers have to keep track of which external routers to which they are connected by communication ports, and of which of alternate routes through the network are the best routes for incoming packets. Individual routers must also accomplish flow accounting, with a flow generally meaning a stream of packets with a common source and end destination. A general desire is that individual flows follow a common path. The skilled artisan will be aware of many such requirements for computerized processing.
Typically a router in the Internet network will have one or more Central Processing Units (CPUs) as dedicated microprocessors for accomplishing the many computing tasks required. In the current art at the time of the present application, these are single-streaming processors; that is, each processor is capable of processing a single stream of instructions. In some cases developers are applying multiprocessor technology to such routing operations. The present inventors have been involved for some time in development of dynamic multistreaming (DMS) processors, which processors are capable of simultaneously processing multiple instruction streams. One preferred application for such processors is in the processing of packets in packet networks like the Internet.
In a data-packet processor a configurable queuing system for packet accounting during processing is known to the inventor, and disclosure of same is referenced herein as Ser. No. 09/737,375 in the cross-reference section of this specification. The queuing and accounting system has a plurality of queues arranged in one or more clusters, an identification mechanism for creating a packet identifier for arriving packets, insertion logic for inserting packet identifiers into queues and for determining into which queue to insert a packet identifier, and selection logic for selecting packet identifiers from queues to initiate processing of identified packets, downloading of completed packets, or for re-queuing of the selected packet identifiers.
A portion of the memory in the above-described system is called packet memory. The packet memory is the memory where data packets are stored before they are downloaded by a packet management unit (PMU) to an output network interface (ONI) during packet processing and routing. A portion of the packet memory described above is called the local packet memory (LPM), and it is directly managed by hardware in the PMU instead of by software.
Whenever a data packet has been processed and is ready to be downloaded from memory, the processing core or streaming processor unit (SPU) sends a command PacketDone to the PMU. This command contains, among other information, a packet identifier (typically a number) of the packet that is ready to be downloaded. The PMU will then proceed with the download of this packet if it resides in LPM. If the packet is not in LPM, the PMU requests to the SIU to download the packet. To the SPU it is transparent whether the packet is in LPM or EPM. A potential problem is that a data coherency problem can exist if the SPU issues any data read/write instructions to the packet data location, and the data read/writes are executed in the LPM after the PacketDone command is executed by the PMU. In this case, the packet may be downloaded without the changes that the processing of the packet required, and further, unintended read and/or write may unintentionally be done to a next packet stored at the location the downloaded packet recently vacated. The downloaded packet may be wrongly processed because it will not, in this case, contain all of the correct data; and a new packet data in the old location may also be corrupted.
Therefore, what is clearly needed is a method and apparatus for guaranteeing that a data packet will not be downloaded from LPM to output until all pending read/writes to that data packet are performed by software and have completed.